Why Can’t I Make My A7 Design Work with SDRAM at Over 50 MHz in FastChip 2.4.0?

Most A7 applications that use SDRAM also share some of the Memory Interface Unit (MIU) pins with an external Flash.

The additional signal loading may prevent the SDRAM interface to operate at higher frequencies.  To compensate for the additional loading, change the electrical properties for some of the SDRAM control pins as described below.

In future versions of FastChip, these settings may happen automatically, based on your MIU settings.

 With the A7 project file open in FastChip, either select Constraints à I/O Editor from the FastChip menu or click the I/O Editor button in the FastChip toolbar.

  When the I/O Editor appears, click Electrical Settings in the toolbar.

 Click the System Pads tab.  Then, locate and double-click the output enable pin, OEN.

 Set the Drive strength to STRONG and the Slew Rate to FAST.  Click OK when finished.

 Repeat Step 4 for the following pins.

• Write enable (WEN)
• SDRAM clock enable (SDCKE)
• SDRAM clock (SDCLK)

 Click OK to close the I/O Editor and save the new settings.

 Re-Bind the project by clicking the Bind button in the FastChip toolbar.

FastChip Version: 2.4.0

This solution may or may not apply to other versions of the FastChip development system.

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